The invention relates to an integrated circuit containing an A/D converter and a test circuit, the operation of said A/D converter being under control of a plurality of analog and digital control signals, one of the latter being a clock signal, said A/D converter including an input facility for receiving an analog input signal, analog signal comparison means connected to the input facility for comparing the analog input signal with a number of reference values and thus generating respective elements of a digital sequence, digital conversion means connected to the analog signal comparison means for converting the digital sequence to a first digital data signal, and a digital output facility that is controlled by the clock signal and connected to the digital conversion means for outputting the first digital data signal.
In view of the importance of the A/D converter for the overall performance of the system of which the converter forms a part, thorough testing of this component is required. The operation of an A/D converter is controlled by a set of time-variant and time-invariant control signals. These control signals, also designated the control path, consist of reference signals, bias signals, clock signals, etc. For proper operation of the converter, these control signals are required to match certain specifications. This is tested only implicitly with functional (data path) testing. Explicit testing of the control path could detect defects and faults that would otherwise escape detection. To make explicit testing feasible, a Design for Testability (DfT) solution is necessary, since the control path is generally not accessible for measurement. In U.S. Pat. No. 5,389,926 a set-up has been disclosed, featuring a test circuit, coupled to an A/D converter. This test circuit is activated in a test mode to connect a terminal to an output node of an internal circuit section of the converter, which has a function of generating a changeable reference voltage at that output node. The magnitude of the thus generated reference voltage can be monitored on the terminal. This set-up, however, does not provide a way for digital on-chip testing of the control signals of the A/D converter.